SIM-331	RB2 and RB4 do not function as I/O's on PIC16F526.
SIM-387	SL wb,wns, wnd instruction does not load destination register with 0x0 when shift value(Content of Wns) is greater than 15 for 16 Bit Devices Simulator.
SIM-396	A/D Result Format Select bit (ADFM) is not changing the result format for PIC18F26K20 & PIC18F46K20 devices
SIM-397	ADC does not operate during sleep for PIC18F26K20 & PIC18F46K20 devices
SIM-398	ATOD conversion time is wrong for PIC18F26K20 & PIC18F46K20 devices
SIM-407	Special Event trigger of CCP2 module does not start ADC module for PIC16LF72X devices
SIM-411	PORTA/ TRISA- bit 6 and 7 are always cleared for PIC16LF/F72X devices
SIM-413	TMR3H register doesn't get updated in the watch window even after doing a read on the timer TMR3L register in the code when configured for 8-bit read/write mode for 18F devices
SIM-415	For the device 18F87J11, the bit ANCON1.PCFG13 always stays 0 (analog) and cannot be made 1.
SIM-416	INTTREG register does not updated with interrupt vector number and priority of interrupt source for 16 bit devices
SIM-419	Interrupt on Change on PORTB is not implemented correctly on the 16F91x family of devices
SIM-425	Bits 0-3 of PORTA & LATA are always set to zero, even when the user tries to change the registers in the code for PIC18F devices
SIM32-154	SC fails in simulator when there is LL instruction immediately following memory access instruction. LL and SC operation in simulator does not match silicon for PIC32MX Family.
SIM32-157	Simulator generates misaligned word access on every alternate run where code has switching between mips16 <->mips32 modes for PIC32 devices

5.1 Repairs and Enhancements Made in v8.14

SIM-386	Request to open up IOFS bit of OSCCON register for r/w so that it can be simulated using stimulus for Midrange devices.
SIM-389	While using USART, the TXIF flag is not being set when the TXMT flag is set, if no characters are loaded and the Transmit is enabled for the PIC18F2550.
SIM-392	Simulator Error message appears after enabling the simulator for 18F24J11, 18F44J11, 18F25J11, 18F2685, 18F26J11, 18F45J11, 18F46J11. Error pops up "The Simulator component for this device could not be initialized"
SIM-401	[Stimulus] ADRES register is not available under register injection tab for the PIC16F72X Family.
SIM32-06	UART reception do not work in non-loopback mode when input text file is provide through UART IO window for PIC32 devices
SIM32-151	Certain instructions following DI/EI gives incorrect result in simulator for PIC32 devices.
SIM32-152	Success or Failure of ll and SC indicator (Value stored in rt) is not available to the instruction immediately following SC for PIC32.
SIM32-153	Simulator failed to give correct result when SW/SH immediately followed by LHU/LB/LH to load the data from upper half word which was stored previously for PIC32.

6 Known Problems

The following is a list of known problems. For information on common problems, error messages and limitations, please see Troubleshooting in the online help file for MPLAB SIM (hlpMPLABSIM.chm).

Debug/Release Build Configuration

Building a project for the simulator under Debug mode will cause unrequired resources to be used. This may cause code without proper paging or banking operations not to function in this mode for 8 bit devices.

System Service Requests (SSRs):

26235:	PIC17C44: TABLATL and TABLATH do not get updated in the Watch window.
26495:	Trace window Reset Time Stamp does not reset the timestamp for Simulators. Time stamp currently same as simulator time. Use Reset command from menu.
27065:	Software clock switching is not simulated.
27447:	COSC <2> and NOSC<2> bits of OSCCON register may not correctly reflect the current oscillator selection.
27634:	PIC18F devices: DAW instruction does not work as expected when DC and C are set.
27707:	Simulator (and trace) are incorrectly calculating the number of cycles required by a PSV access for dsPIC30F devices.
28363:	For PIC24F and possibly some PIC18F devices, simulator does not implement the RC coupling delay experienced on real silicon when I/O PORTs are written to followed by an immediate read operation.
28391:	Logic Analyzer is currently only cycle based.
28576	PWM Output override is not implemented for dsPIC33 and dsPIC30F devices in simulator.
28770:	Simulator does not support table writes to the configuration bits; a limitation needs to be added for PIC18 devices.
29088:	Interrupt on the falling edge does not occur on PIC16C781/2.
29518:	Flash configuration word write using table write operation is not implemented for PIC24F devices.
MPLAB-661:	[Call Stack] Simulator can hang when stepping through MPLAB C30 optimized code with the Call Stack window open.
SIM-285:	ISR entry latency for Soft trap do not match silicon for 16-bit simulator.
SIM-363:	Request to access the Device ID via table read instruction in the Simulator for 16 bit devices.
SIM-365:	Programming/Erase of flash word option is not simulated for PIC24F devices
SIM-381:	Code Guard feature for Data memory, EEPROM, Program/Erase of Config fuses and flash not supported in this release'
SIM-399:	RE3 bit of PORTE is always set to 1 for PIC18F26K20 & PIC18F46K20 devices.
SIM-404:	Value of the STKPTR wraps around after the Stack Overflow, even when the configuration bit "Stack Overflow Reset" (STVR=OFF) is disabled for PIC18F1220
SIM-423:	Flash and EEPROM write/Erase operation does not work for many options for PIC24FKA devices
SIM-440:	H:M:S does not work as a time base in stimulus window
SIM-446:	Simulator causes reset or behaves incorrectly if instruction at 4th cycle lag of stack error trap happens to be stack related instruction for 16 bit devices
SIM32-3:	UART1 and UART2 do not generate receive error interrupt (UxEIF) when receiver overrun error has occurred.
SIM32-30:	EHB, JALR.HB, JR.HB, SYNC, RDHWR, SYSCALL, SDBBP and WRPGPR are not implemented in simulator EHB.
SIM32-48:	Interrupt latency may be off by 1-2 cycles in simulator.
SIM32-67:	Attempt to read from the configuration memory location generates a trap.
SIM32-100:	If Interrupt generated at certain stage of pipe lien while processing MUL, MADD, MULT , MSUB etc gives incorrect result in simulator for PIC32 devices
SIM32-103:	Analog comparator may not generate interrupt properly for PIC32MX devices.
SIM32-107:	OSCCON write lock sequence is not implemented in simulator for PIC32MX devices.
SIM32-121:	EICSS filed of SRSctl register is does not get updated when interrupt get generated in SIM32 for PIC32 devices.